This invention relates to random-access-memory circuits, and more particularly, to circuitry for reading and writing data from a random-access memory circuit that may be configured as a true dual port memory or a simple dual port memory.
Memory arrays are used in integrated circuits such as integrated circuit memories and programmable logic devices.
Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design (CAD) tools to design a custom logic circuit. These tools help the designer to implement the custom logic circuit using the resources available on a given programmable logic device. When the design process is complete, the CAD tools generate configuration data files. The configuration data is loaded into programmable logic devices to configure them to perform the desired custom logic function.
Programmable logic devices may contain configurable random-access-memory arrays. A configurable random-access-memory array can be configured as a true dual port memory or as a simple dual port memory, as needed by a logic designer.
Configurable random-access-memory arrays have multiplexer circuitry. The multiplexer circuitry is used to route input and output data signals from the memory cells in the array.
Conventional configurable random-access-memory arrays use multiplexer circuitry in which data and precharge signals traverse multiple pass gates. Some of the pass gates are complementary metal-oxide-semiconductor (CMOS) pass gates that are used for both read and write operations. The use of these pass gates tends to create circuit loading effects that can slow device performance during precharging and during data read and write operations.
It would therefore be desirable to be able to provide improved configurable random-access-memory arrays for integrated circuits such as programmable logic device integrated circuits.